A variable frequency oscillator (VFO) generally produces an oscillating signal with a frequency that may be controlled by an external control. The control signal may generally comprise a variable voltage (for a voltage controlled oscillator [VCO]), a variable current, or a numeric digital value (for a digital or numerically controlled oscillator [NCO]). VFOs generally have characteristic gain curves such as those shown in FIG. 1A. This gain curve relates the frequency of oscillation to the input control amplitude.
FIG. 1A shows gain curves for a hypothetical oscillator over three different manufacturing process runs. For CMOS processes, manufacturing variations occur in a wide variety of parameters. From the viewpoint of circuit operation, some of the most important are transistor threshold, transconductance, and parasitic capacitance. The three curves of FIG. 1A represent gain curves for the same oscillator design over fast, typical, and slow process variations. A slow process corner (e.g., a process resulting in a VFO with gain curve 101) may have high threshold transistors of low transconductance (gm) and high parasitic capacitance. Gain curve 102 represents a nominal center of the manufacturing process. A fast process corner (e.g., a process resulting in a VFO with gain curve 103) may have transistors of low threshold, high gain, and low parasitic capacitance.
FIG. 1A shows that an oscillator may have unacceptable frequency output characteristics under some process variations. Frequency 110 represents the target frequency for a hypothetical application of an oscillator. FIG. 1A shows that an oscillator with slow gain curve 101 cannot attain nominal center frequency 110, because no point on slow gain curve 101 intersects the target frequency. Thus, for this hypothetical application, chips manufactured at a slow process corner generally cannot be used.
FIG. 1B shows a more desirable set of gain curves for a hypothetical oscillator which is usable under all manufacturing process variations. In such a hypothetical oscillator, nominal center frequency 110′ may be similar for all 3 curves, such that only the slope (gain) changes. Generally when such an oscillator is used in a phase locked loop, the lowest jitter and highest stability may be obtained with the minimum gain slope for the application. Therefore, it is desirable to produce a variable frequency oscillator which can compensate for process variations in such a manner. In order to reduce manufacturing costs, it is even more desirable to produce such a variable frequency oscillator using standard integrated circuit processes.
The problem of process variation particularly applies to oscillators consisting only of components manufactured according to standard integrated circuit processes. VFOs which include tuned resonators (e.g., inductors, crystals, SAW resonators, etc.) generally do not vary as much in frequency over process variations. However, these non-standard or “off-chip” resonators may significantly increase manufacturing costs. Therefore, it is even more desirable to produce a variable frequency oscillator which can compensate for process variations using standard integrated circuit processes, so that substantially all of the VFO can be produced on-chip.
It can be seen that circuits and methods for compensating the gain and center frequency of a variable oscillator (and particularly a ring oscillator) for process variations is desirable. In addition, a digital circuit is preferable to analog circuitry for modem CMOS processes where digital logic tends to occupy less die area than analog functions. Furthermore, a reduction in slope of the gain curve (e.g., reduced variation in frequency for equal variation in control signal) is desirable when the variable oscillator is used in phase locked loop applications. The compensation circuits and methods should allow such a reduction in slope while preserving the usability of the variable oscillator for a wide range of process variations.